标题： 重新思考CGRA中的内存限制 显示英文标题

标题： Re-thinking Memory-Bound Limitations in CGRAs

摘要： 粗粒度可重构阵列（CGRAs）是专门的加速器，通常用于提升具有迭代结构的工作负载的性能。 现有研究通常专注于编译器或架构优化，旨在提高CGRA的性能、能效、灵活性和面积利用率，在理想化的假设下，内核可以访问来自Scratchpad Memory（SPM）的所有数据。 然而，某些复杂的工作负载——特别是在图分析、不规则数据库操作和特定形式的高性能计算（例如，非结构化网格模拟）领域——表现出不规则的内存访问模式，这会阻碍CGRA的利用，有时低于1.5%，使CGRA成为内存受限的。 为了解决这一挑战，我们对性能下降的根本原因进行了深入分析，然后提出了重新设计的存储子系统并改进了存储模型。 通过微架构和理论优化，我们的解决方案可以通过CGRA特有的提前执行机制和缓存重新配置技术有效管理不规则的内存访问。 我们的结果表明，我们可以在仅需要原始SPM-only系统1.27%存储大小的情况下，实现相当的性能。 提前执行机制平均提升了3.04倍（最高达6.91倍），而缓存重新配置技术提供了额外的6.02%的改进，显著提升了CGRA在不规则内存访问模式下的性能。 显示英文摘要

摘要： Coarse-Grained Reconfigurable Arrays (CGRAs) are specialized accelerators commonly employed to boost performance in workloads with iterative structures. Existing research typically focuses on compiler or architecture optimizations aimed at improving CGRA performance, energy efficiency, flexibility, and area utilization, under the idealistic assumption that kernels can access all data from Scratchpad Memory (SPM). However, certain complex workloads-particularly in fields like graph analytics, irregular database operations, and specialized forms of high-performance computing (e.g., unstructured mesh simulations)-exhibit irregular memory access patterns that hinder CGRA utilization, sometimes dropping below 1.5%, making the CGRA memory-bound. To address this challenge, we conduct a thorough analysis of the underlying causes of performance degradation, then propose a redesigned memory subsystem and refine the memory model. With both microarchitectural and theoretical optimization, our solution can effectively manage irregular memory accesses through CGRA-specific runahead execution mechanism and cache reconfiguration techniques. Our results demonstrate that we can achieve performance comparable to the original SPM-only system while requiring only 1.27% of the storage size. The runahead execution mechanism achieves an average 3.04x speedup (up to 6.91x), with cache reconfiguration technique providing an additional 6.02% improvement, significantly enhancing CGRA performance for irregular memory access patterns.