标题： 具有ADC-PWM同步的数字控制降压变换器的精确小信号建模 显示英文标题

标题： Accurate Small-Signal Modeling of Digitally Controlled Buck Converters with ADC-PWM Synchronization

摘要： 数字控制在现代电力电子转换器中变得越来越普遍。 当获取电感电流等反馈信号时，通常采用模拟-数字转换器（ADC）与数字脉宽调制器（DPWM）同步，以准确跟踪其稳态平均值。 然而，这种同步的小信号影响尚未被研究。 本文提出了一种精确的小信号模型，用于在恒定频率电流模式控制下，以强制连续导通模式（FCCM）运行的数字控制降压转换器，明确考虑了DPWM-ADC同步。 使用采样数据框架，所提出的模型捕捉了采样过程引入的所有边带效应，即使在开关和采样频率以上的频率下，也能精确预测模拟和数字环路增益。 考虑了不对称和对称载波调制。 此外，使用修改后的z变换推导出数字环路增益的闭合形式，从而实现了低复杂度补偿器设计和稳定性评估。 在此框架内，可以直接从数字环路增益获得模拟环路增益，从而消除了计算密集型无限级数评估的需要。 通过仿真和实验结果验证了所提出模型的有效性。 显示英文摘要

摘要： Digital control has become increasingly widespread in modern power electronic converters. When acquiring feedback signals such as the inductor current, synchronizing the analog-to-digital converter (ADC) with the digital pulse-width modulator (DPWM) is commonly employed to accurately track their steady-state average. However, the small-signal implications of such synchronization have not been investigated. This paper presents an exact small-signal model for digitally controlled buck converters operating in forced continuous-conduction mode (FCCM) under constant-frequency current-mode control, explicitly accounting for DPWM-ADC synchronization. Using a sampled-data framework, the proposed model captures all sideband effects introduced by the sampling process, yielding precise predictions of both analog and digital loop gains, even at frequencies beyond the switching and sampling frequencies. Both asymmetrical and symmetrical carrier modulations are considered. Furthermore, the digital loop gain is derived in closed form using the modified z-transform, enabling low-complexity compensator design and stability assessment. Within this framework, the analog loop gain can be directly obtained from the digital loop gain, thereby eliminating the need for computationally intensive infinite series evaluations. The validity of the proposed model is confirmed through both simulation and experimental results.